1. Technical Field
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a body contact through a gate, and a method of fabricating the same.
2. Discussion of the Related Art
Semiconductor devices require high integration density, low threshold voltage (Vth), high operating speed, and low power consumption. This allows electronic products that employ such semiconductor devices to be light weight and small. A semiconductor device generally uses a discrete device such as a MOS transistor for a switching element. Stacking a plurality of transistors within the limited areas on a semiconductor substrate is a way of achieving high integration. A method of stacking transistors includes forming a first transistor on the semiconductor substrate, forming an insulating layer covering the first transistor, and then forming a second transistor on the insulating layer. However, there are many problems involved with the technology of stacking transistors, as now discussed.
Semiconductor devices having transistors stacked on a semiconductor substrate are disclosed in U.S. Pat. No. 6,022,766, titled “Semiconductor structure incorporating thin film transistors and methods for its manufacture”, to Chen et al.
FIG. 1 is a cross-sectional view illustrating the structure of stacked transistors according to Chen et al.
Referring to FIG. 1, a thin film transistor is formed on a bulk transistor, which in turn is formed on a single crystal silicon substrate. Further, an interlayer dielectric layer and a cap oxide layer 189 are sequentially stacked between the bulk transistor and the thin film transistor. The thin film transistor includes a body layer disposed on the cap oxide layer 189. The body layer is divided into source/drain regions 190A, 190B and a channel region 196. A gate electrode 194A is disposed on the channel region 196. A gate insulating layer 192 is interposed between the gate electrode 194A and the body layer. An upper insulating layer 198 is formed to cover the overall surface of the semiconductor substrate having the gate electrode 194A.
Plugs 182, 184 are disposed on the source/drain regions of the bulk transistor. One of the source/drain regions of the bulk transistor is electrically connected to one of the source/drain regions 190A, 190B of the thin film transistor through the plug 182 and an interfacial cap 188A formed on the plug 182.
The body layer of the thin film transistor is formed by first forming an amorphous silicon layer on the overall surface of the semiconductor substrate having the plugs 182, 184 and the interfacial cap 188A, and crystallizing the amorphous silicon layer by an annealing process. In this case, the body layer is a polysilicon layer having large-sized grains.
The channel region 196 of the thin film transistor is in a floating state. That is, since the channel region 196 of the thin film transistor is electrically isolated by the interlayer dielectric layer and the cap oxide layer 189, the voltage of the channel region 196 may be varied in accordance with the voltage applied to the source/drain regions 190A, 190B or the gate electrode 194A. The voltage variation of the channel region 196 is commonly known as the “floating body effect”. Problems may arise if the floating body effect interferes with the operation of the thin film transistor, such as a kink effect and a parasitic bipolar effect, which are now explained.
When the channel region 196 is partially depleted and a high voltage is applied to the drain region, the electric field generated in the thin film transistor causes impact ionization near the drain region. Thus, if the thin film transistor is an NMOS transistor, holes generated by the impact ionization are implanted into the channel region 196, so that the channel region 196 is charged with a positive potential. The positive charges stored in the channel region 196 increase the potential of the channel region 196, thereby decreasing the threshold voltage of the thin film transistor. The decrease of the threshold voltage increases the drain current, thereby showing a kink effect in the output characteristics of the thin film transistor.
Another result caused by the charge in the channel region 196 is a turn-on of a transverse type bipolar transistor structure, which is formed from a MOS transistor, and consists of a source region, the channel region 196, and the drain region, that is, an n-p-n structure.
When the channel region 196 of the thin film transistor is biased with a positive voltage, forward bias is applied to the junction between the source region and the channel region 196 corresponding to the emitter-base junction of the transverse type n-p-n structure, and electrons are implanted from the source region to the channel region 196. The electrons implanted into the channel region 196 reach a drain depletion region to increase the drain current. As a result, the drain current is dominantly controlled by the parasitic bipolar transistor rather than by the channel current flowing under the control of the gate electrode 194A. Such a result is called a parasitic bipolar effect. The parasitic bipolar effect of the thin film transistor causes a leakage current and provides undesired results.
Therefore, methods are needed to improve the characteristics of the thin film transistor stacked on the semiconductor substrate.